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HW Security: 2.5D and 3D Technologies Provide Opportunities in Designing Secure Systems (UCSB, Columbia)

A new technical paper titled “Leveraging 3D Technologies for Hardware Security: Opportunities and Challenges” was published by researchers at the University of California, Santa Barbara and Columbia University. Abstract “3D die stacking and 2.5D interposer design are promising technologies to improve integration density, performance and cost. Current approaches face serious issues in dealing with emerging security challenges such as side channel…
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Semiconductor Engineering broke the news in on Friday, September 5, 2025.
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