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IBM unveils tech for chip smaller than 1 nanometer in AI computing push

IBM says the 3D NanoStack design could boost performance by 50% and cut energy use by 70% as AI chip demand grows.

  • On Thursday, IBM unveiled the world's first sub-1 nanometer chip technology, featuring a revolutionary 3D NanoStack transistor architecture at the 0.7 nm, or 7 angstrom, node.
  • Facing the physical limits of horizontal transistor scaling, IBM developed NanoStack to vertically stack and stagger transistors, packing nearly 100 billion transistors onto a fingernail-sized silicon surface.
  • Compared to previous architectures, the new design delivers up to 50% higher performance or 70% lower power consumption; Jay Gambetta, director of IBM Research, called it a "landmark moment."
  • Shares of the Armonk, New York-based company rose over 6% in premarket trading, bolstering IBM's competitive position against contract chipmakers TSMC and Intel.
  • IBM projects commercial production of NanoStack chips could begin in as early as the next 5 years, extending the semiconductor industry's scaling roadmap for at least a decade.
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IBM Presents First Sub-1 Nanometer Chip Technology of the World

·Buenos Aires, Argentina
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MIT Technology Review broke the news in Boston, United States on Thursday, June 25, 2026.
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